Hardware Architecture

Cognitive Technology Team

Mar 25, 2025 · Fundamentals

Understanding the Java Memory Model and Its Interaction with Hardware Memory Architecture

This article explains how the Java Memory Model defines the interaction between threads, thread stacks, and the heap, illustrates these concepts with diagrams and example code, and discusses how modern hardware memory architecture, caches, and CPU registers affect visibility and race conditions in concurrent Java programs.

Hardware ArchitectureJavaMemory Model

0 likes · 11 min read

Understanding the Java Memory Model and Its Interaction with Hardware Memory Architecture

Tencent Technical Engineering

Mar 21, 2025 · Fundamentals

Fundamentals of GPU Architecture and Programming

The article explains GPU fundamentals—from the end of Dennard scaling and why GPUs excel in parallel throughput, through CUDA programming basics like the SAXPY kernel and SIMT versus SIMD execution, to the evolution of the SIMT stack, modern scheduling, and a three‑step core architecture design.

CUDAGPUGPU programming

0 likes · 42 min read

Fundamentals of GPU Architecture and Programming

Python Programming Learning Circle

Jan 6, 2025 · Fundamentals

Beyond Moore's Law: Software, Algorithms, and Architecture as New Performance Drivers

The article examines how, as Moore's Law ends, performance gains will increasingly rely on software optimization, algorithmic advances, and hardware architecture innovations, illustrated by matrix multiplication benchmarks and discussions of Dennard scaling, parallelism, and emerging technologies.

AlgorithmsHardware ArchitectureMoore's law

0 likes · 10 min read

Beyond Moore's Law: Software, Algorithms, and Architecture as New Performance Drivers

Refining Core Development Skills

Jun 14, 2024 · Fundamentals

Why Server Memory Modules Have More Chips Than Desktop Memory

The article explains that server memory modules contain more chips because they need ECC error‑correction, additional register and data buffer chips for RDIMM/LRDIMM designs, which increase chip count, improve signal integrity, and allow larger capacities.

ECCHardware ArchitectureLRDIMM

0 likes · 9 min read

Why Server Memory Modules Have More Chips Than Desktop Memory

Python Programming Learning Circle

May 28, 2024 · Fundamentals

Beyond Moore's Law: Leveraging Software, Algorithms, and Architecture for Future Performance Gains

With Moore's Law reaching its limits, a recent Science paper by MIT, Nvidia, and Microsoft researchers argues that future computing performance will rely on improvements in the software stack, algorithmic innovations, and hardware architecture, as demonstrated by performance engineering benchmarks and evolving hardware trends.

AlgorithmsHardware ArchitectureMoore's law

0 likes · 9 min read

Beyond Moore's Law: Leveraging Software, Algorithms, and Architecture for Future Performance Gains

DevOps Operations Practice

Apr 29, 2024 · Fundamentals

Introduction to CPUs and GPUs: Functions, Advanced Features, and Key Differences

This article explains the basic functions of CPUs and GPUs, their advanced capabilities and real‑world applications, and compares their architectures, processing models, and roles in environments such as IoT, mobile devices, Kubernetes, and AI workloads.

AI accelerationCPUGPU

0 likes · 7 min read

Introduction to CPUs and GPUs: Functions, Advanced Features, and Key Differences

Architects' Tech Alliance

Oct 2, 2023 · Fundamentals

Resource‑Decoupled Data Center Architecture and Emerging Technologies (DPU, IPU, CXL)

The article explains the limitations of traditional server‑centric data centers, introduces resource‑decoupled architectures that separate compute, storage, and networking resources, and reviews key enabling technologies such as DPUs, IPUs, and the CXL interconnect, highlighting their roles in modern cloud and AI workloads.

CXLDPUHardware Architecture

0 likes · 11 min read

Resource‑Decoupled Data Center Architecture and Emerging Technologies (DPU, IPU, CXL)

Architects' Tech Alliance

Sep 17, 2023 · Fundamentals

FPGA Overview: Architecture, Memory Hierarchy, and NoC Advantages

This article provides a comprehensive overview of FPGA technology, detailing its programmable logic cells, input/output blocks, switch matrices, historical evolution, flexibility versus ASIC and GPU, memory hierarchy including on‑chip and HBM2e, and the benefits of Network‑on‑Chip architectures for performance, power and design modularity.

ASICFPGAGPU

0 likes · 12 min read

FPGA Overview: Architecture, Memory Hierarchy, and NoC Advantages

Architects' Tech Alliance

Sep 11, 2023 · Artificial Intelligence

Open Acceleration Specification AI Server Design Guide (2023): Architecture, OAM Modules, UBB Board, and System Design

The 2023 Open Acceleration Specification AI Server Design Guide details the hardware architecture, OAM module and UBB board specifications, cooling, management, fault diagnosis, and software platform needed to build high‑performance, scalable AI compute clusters for large‑model training.

AI accelerationHardware ArchitectureLarge Model Training

0 likes · 10 min read

Open Acceleration Specification AI Server Design Guide (2023): Architecture, OAM Modules, UBB Board, and System Design

Architects' Tech Alliance

Aug 14, 2023 · Fundamentals

How Many PCBs Does an AI Server Use? Detailed Breakdown of NVIDIA DGX A100

This report dissects the NVIDIA DGX A100 AI server, quantifying the PCB area and monetary value of its five hardware sections—GPU board, CPU motherboard, fans, storage, and power—revealing a total PCB consumption of 1.474 m² worth ¥15,321 per machine.

AI serverHardware ArchitectureNVIDIA DGX A100

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How Many PCBs Does an AI Server Use? Detailed Breakdown of NVIDIA DGX A100

Architects' Tech Alliance

Jul 29, 2023 · Artificial Intelligence

AI Server Market Overview and Technical Architecture

The article provides a comprehensive analysis of the AI server market, detailing server hardware components, cost distribution, logical architecture, firmware, rapid market growth, competitive landscape, AI-driven heterogeneous computing, and future industry trends, while highlighting key vendors and deployment configurations.

AI ServersGPUHardware Architecture

0 likes · 10 min read

AI Server Market Overview and Technical Architecture

Architects' Tech Alliance

Jul 10, 2023 · Fundamentals

Aligning the PCI‑Express Roadmap with the Cadence of Compute Engines and Networks

The article argues that PCI‑Express specifications, controllers, and switches must adopt a coordinated two‑year release cadence that matches CPU, GPU, and accelerator roadmaps, urging the PCI‑SIG to accelerate to PCI‑Express 7.0 to meet the bandwidth demands of modern data‑center and AI workloads.

CPUGPUHardware Architecture

0 likes · 13 min read

Aligning the PCI‑Express Roadmap with the Cadence of Compute Engines and Networks

Architects' Tech Alliance

Apr 23, 2023 · Fundamentals

Understanding FPGA: Architecture, Advantages, and Market Overview

This article explains what FPGA chips are, how they differ from CPUs, GPUs and ASICs, describes their internal programmable architecture and LUT-based logic, highlights their short development cycle and parallel computing benefits, and provides a detailed market analysis of Chinese FPGA applications and future growth prospects.

Digital Integrated CircuitsFPGAHardware Architecture

0 likes · 16 min read

Understanding FPGA: Architecture, Advantages, and Market Overview

Architects' Tech Alliance

Mar 29, 2023 · Fundamentals

Stream Multiprocessor (SM) Architecture and Execution Pipeline in GPUs

This article provides a comprehensive overview of GPU stream multiprocessors, detailing their micro‑architecture, instruction fetch‑decode‑execute pipeline, SIMT/ SIMD organization, warp scheduling, scoreboard mechanisms, and techniques for handling thread divergence and deadlock in GPGPU designs.

GPUHardware ArchitectureInstruction Pipeline

0 likes · 16 min read

Stream Multiprocessor (SM) Architecture and Execution Pipeline in GPUs

Architects' Tech Alliance

Jan 9, 2023 · Fundamentals

GPU Overview: Principles, Use Cases, Limitations, and Market Landscape

This article explains GPU fundamentals, describing its role as a graphics‑oriented co‑processor, the reasons for using GPUs and other accelerators, the tasks they excel at and those they cannot handle, and outlines current market trends and architectural trade‑offs.

GPUHardware ArchitectureParallel Computing

0 likes · 9 min read

GPU Overview: Principles, Use Cases, Limitations, and Market Landscape

Architects' Tech Alliance

Sep 28, 2022 · Fundamentals

Comprehensive Overview of Server Architecture, Industry Chain, and Market Trends (2022)

This article provides a detailed analysis of server hardware architectures, industry supply chain, cost structures, market share, and emerging CPU trends such as X86 dominance and ARM growth, while also offering downloadable resources and insights into China's domestic substitution policies.

CPUCloud ComputingHardware Architecture

0 likes · 11 min read

Comprehensive Overview of Server Architecture, Industry Chain, and Market Trends (2022)

Baidu Tech Salon

Jul 4, 2022 · Artificial Intelligence

Kunlun Chip XPU Architecture, Software Stack, and Programming Model Overview

Kunlun Chip’s XPU‑R architecture combines high‑performance SDNN and Cluster compute units, 512 GB/s GDDR6 memory, and PCIe 4.0 interconnect, supported by an LLVM‑based software stack, CUDA‑like programming model, and seamless PaddlePaddle integration, enabling efficient AI training and inference with significant cost and performance gains.

AI chipHardware ArchitecturePaddlePaddle

0 likes · 16 min read

Kunlun Chip XPU Architecture, Software Stack, and Programming Model Overview

Architects' Tech Alliance

May 31, 2022 · Fundamentals

AMD’s Next‑Gen Navi 31 GPU Is Likely a Single‑Chip Design, Not a Multi‑Chiplet Monster

Recent analysis suggests that AMD’s upcoming top‑tier RDNA 3 GPU, the Navi 31, will abandon the rumored multi‑chiplet architecture in favor of a single, powerful compute die, reducing shader count and TFLOP ratings while still promising strong performance for gaming and data‑center workloads.

AMDGPUHardware Architecture

0 likes · 7 min read

AMD’s Next‑Gen Navi 31 GPU Is Likely a Single‑Chip Design, Not a Multi‑Chiplet Monster

Architects' Tech Alliance

Aug 4, 2021 · Cloud Computing

Edge Computing Hardware Architecture and Emerging Trends

The article examines edge computing hardware architecture, discussing diverse use cases, evolving server and processor trends—including ARM, Intel, Nvidia, AMD, FPGA, and DPU—open hardware standards, reliability, virtual networking, and storage innovations, highlighting how these developments shape the future of cloud and edge infrastructures.

ARMCloud ComputingDPU

0 likes · 16 min read

Edge Computing Hardware Architecture and Emerging Trends

Architects' Tech Alliance

Mar 7, 2021 · Fundamentals

Understanding the Linux Graphics Stack from a GPU Perspective

This article explains the role of GPUs in computing, traces the evolution of graphics standards and GPU architectures, and details the development of the Linux graphics stack from early X11 to modern Wayland, providing a comprehensive overview for developers and hardware enthusiasts.

GPUGraphics StackHardware Architecture

0 likes · 3 min read

Understanding the Linux Graphics Stack from a GPU Perspective