Why Server Memory Modules Have More Chips Than Desktop Memory
The article explains that server memory modules contain more chips because they need ECC error‑correction, additional register and data buffer chips for RDIMM/LRDIMM designs, which increase chip count, improve signal integrity, and allow larger capacities.
Hello everyone, I am Fei!
A reader asked why server memory modules have many more chips, so I wrote this article to explain.
Server‑side developers work with code that relies heavily on memory, so understanding server memory hardware is useful.
I obtained a 32 GB server DIMM and photographed its front and back.
The server DIMM shows many black chips compared with a desktop module.
We will now explain why server memory has more chips.
Reason 1: Server Memory Requires ECC
The front label of the DIMM reads 32 GB 2R*4 PC4-2666V-RB2-12-DB1 .
In this label, "32 GB" is the capacity, "2R*4" means the module has 2 ranks and each chip is 4 bits wide (see the article “Understanding Memory Rank, Bus Width and Chip Structure”).
With a 4‑bit width, each rank would need 16 chips, so two ranks need 32 chips.
However, the photographed module has 19 chips on the front and 18 on the back, totaling 37 chips.
This is because server memory adds ECC chips and register modules to improve reliability and capacity.
DRAM is volatile and can experience bit‑flip errors; an 8 GB module may see 1‑5 bit flips per hour.
In desktop use, such errors may only affect a pixel, but in servers, where calculations are critical and uptime must be months or years, errors are unacceptable.
ECC (Error Checking and Correcting) not only detects but also corrects memory errors.
ECC memory adds extra chips dedicated to error detection and correction.
ECC memory provides a 72‑bit data path: 64 bits for data and 8 bits for ECC parity.
Summary of chip count:
Each rank needs 2 extra chips for ECC (4 bit width + 8 bit ECC = 18 chips per rank).
Two ranks therefore need 36 chips for data and ECC.
Reason 2: RDIMM Address‑Signal Buffer (RCD)
We counted 36 chips for data/ECC but observed 37 chips; the extra chip is used for address and control signal buffering.
Servers typically use RDIMM (registered DIMM) or LRDIMM (load‑reduced DIMM). Both add a Register Clock Driver (RCD) module.
The RCD receives command, address, control, and clock signals from the memory controller, retimes and cleans them, then fans them out to the DRAM chips, reducing signal interference and allowing larger per‑module capacity.
With this module, signal integrity improves dramatically, enabling higher capacity DIMMs.
Reason 3: LRDIMM Data‑Buffer (DB)
For very large memory capacities, RDIMM may still be insufficient, so LRDIMM adds an additional Data Buffer (DB) on top of the RCD.
The DB buffers data signals from the memory controller and the DRAM chips, providing full buffering of address, control, and data signals. This further reduces interference and supports even larger capacities, albeit at higher cost.
Below is a photo of an LRDIMM module.
In summary, server memory has more chips for three reasons:
ECC requires roughly 1/8 more chips to store parity data.
An RCD module buffers address and control signals, allowing larger per‑module capacity.
A DB module in LRDIMM buffers data signals, further increasing capacity.
For a deeper dive into RDIMM and LRDIMM principles, I recommend this clear YouTube video: https://www.youtube.com/watch?app=desktop&v=opR0pARpieg
That’s all for this episode. Fei will continue to help you grow on your technical journey!
Refining Core Development Skills
Fei has over 10 years of development experience at Tencent and Sogou. Through this account, he shares his deep insights on performance.
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