AMD’s Next‑Gen Navi 31 GPU Is Likely a Single‑Chip Design, Not a Multi‑Chiplet Monster
Recent analysis suggests that AMD’s upcoming top‑tier RDNA 3 GPU, the Navi 31, will abandon the rumored multi‑chiplet architecture in favor of a single, powerful compute die, reducing shader count and TFLOP ratings while still promising strong performance for gaming and data‑center workloads.
Earlier rumors claimed AMD’s next‑generation GPU, Navi 31, would use a dual‑GPU chiplet design, but current evidence points to a single, high‑performance compute chip as the core of the processor.
AMD’s flagship RDNA 3 GPU is no longer considered a multi‑chiplet GPU from a graphics‑compute perspective; instead, the Navi 31 chip appears to integrate the latest Zen 2‑derived technology directly into the graphics die.
Speculation about the chip’s specifications has shifted: initial figures of 15,360 shaders delivering 92 TFLOPs on two graphics compute dies (GCDs) have been revised down to 12,288 shaders and 72 TFLOPs on a single 5 nm GCD, surrounded by six 6 nm multi‑cache dies (MCDs) that act mainly as cache rather than additional compute units.
Red Gaming Tech’s recent video supports the leak, showing the entire shader count placed on one GCD with the surrounding cache chips, suggesting the multi‑chip design is primarily for memory‑controller and cache functions, simplifying system integration.
The article notes that while a true multi‑GPU package could benefit data‑center and rendering workloads, it poses challenges for gaming, where multi‑GPU scaling has historically been poor and costly.
Finally, the piece warns that Nvidia’s upcoming Ada Lovelace GPUs will face stiff competition, as AMD’s single‑chip approach may deliver comparable performance without the complexity of multi‑chip designs.
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