1 views collected around this technical thread.
This article compares the major CPU instruction set architectures—x86, ARM, and RISC‑V—detailing their design philosophies, evolution, strengths, and weaknesses, while also summarizing recent updates in CPU, GPU, memory, and storage technologies and highlighting the trade‑offs between CISC and RISC approaches.
The article provides a detailed technical overview of Huawei's Kunpeng 920 processor, describing its ARM‑based RISC architecture, chip organization, core and cluster layout, security features, IMU management, and the various subsystems such as IO, interrupt, network, SAS, and PCIe.
From a rapid BBC Micro prototype in the early 1980s to the 1985 launch of the Acorn RISC Machine, ARM evolved into a low‑power, licensed CPU core that powered devices from the Newton to today’s iPhone, ultimately becoming the world’s most ubiquitous processor architecture.
This article provides a comprehensive overview of contemporary processor instruction set architectures, comparing CISC‑based x86 with RISC‑based ARM and RISC‑V, discussing their design philosophies, historical evolution, advantages, disadvantages, and the current landscape of domestic and international CPU development.
This article provides a comprehensive overview of modern processor instruction set architectures, comparing CISC‑based x86 with RISC‑based ARM and RISC‑V, discussing their historical development, design philosophies, advantages, disadvantages, and current market adoption in both domestic and global contexts.
The article explains the fundamental differences between ARM and x86 CPUs, compares RISC and CISC instruction set philosophies, discusses how each architecture balances transistor count, performance, power consumption and cost, and highlights why ARM dominates low‑power devices while x86 remains prevalent in high‑performance computers.
The article provides a detailed technical overview of Huawei's Kunpeng 920 processor, describing its ARM‑based RISC architecture, chip organization, core and cluster hierarchy, security features, and the various compute, I/O, interrupt, network, SAS, and PCIe subsystems integrated on the SoC.
The article provides a comprehensive overview of China’s domestic CPU ecosystem, explaining the role of CPUs as the digital foundation, comparing CISC and RISC instruction sets, and detailing the product lines and strategies of major manufacturers such as Huawei Kunpeng, HaiGuang, Feiteng, and Loongson, while concluding with market trends and competitive analysis.
The article provides a detailed technical overview of Huawei's Kunpeng 920 processor, describing its ARM‑based RISC architecture, chip organization, core and cache hierarchy, security features, IMU management, and the design of its I/O, interrupt, network, SAS, and PCIe subsystems.
The article explains how X86 (CISC) and ARM (RISC) CPU architectures differ in performance goals, power consumption, application domains, instruction set complexity, and market trends, highlighting their respective strengths in servers, PCs, mobile devices, and emerging data‑center workloads.
The article explains how mobile processors prioritize low power, heat, and voltage while improving performance, compares RISC and CISC architectures, discusses the X86‑ARM rivalry, and outlines the rise of heterogeneous System‑on‑Chip designs and their expanding applications across consumer electronics.
The article introduces LoongArch, Loongson's self‑defined RISC instruction set architecture, detailing its evaluation approval, instruction count, format extensions, binary translation compatibility with MIPS, x86, ARM and RISC‑V, ecosystem plans, IP core updates, and the company’s strategy to build a domestic CPU ecosystem.
This article chronicles the development of DEC's Alpha processor—from its roots in the pioneering DEC company and the VAX era, through its groundbreaking RISC design and industry impact, to its eventual decline and lasting influence on modern CPU architectures.
This article explains the fundamental differences between CISC and RISC processor designs, outlines their respective advantages and drawbacks, and compares three major CPU architectures—x86, ARM, and MIPS—highlighting their histories, features, and typical application domains.
The article provides a detailed comparison between ARM's RISC-based processors and Intel's x86 CISC architecture, covering design philosophy, performance, power consumption, expansion capabilities, operating system compatibility, software development tools, and cost considerations for various terminal applications.
This article explains the fundamental differences between RISC and CISC architectures, reviews the historical development and technical characteristics of processors such as MIPS, ARM, and x86, and discusses why China’s Loongson chips favor the MIPS instruction set over alternatives.
The article provides a comprehensive overview of RISC principles and compares major processor families—including ARM, x86, Atom, MIPS, and PowerPC—detailing their architectures, performance characteristics, market adoption, and licensing models while also mentioning related DSP technologies and reference resources.
This article provides a detailed comparison between ARM's RISC-based processors and Intel's CISC‑based x86 CPUs, covering design philosophies, performance, power consumption, expansion capabilities, operating‑system compatibility, software development tools, cost factors, and suitable application scenarios.
This article provides a comprehensive overview of RISC architecture and its major implementations—including ARM, x86/Atom, MIPS, and PowerPC—detailing their design principles, performance characteristics, market adoption, and relevance to embedded and mobile systems.
This article chronicles the development, competition, and strategic shifts of the x86 and ARM processor ecosystems from their early days through recent innovations, highlighting key architectural decisions, market dynamics, and the evolving role of software abstraction layers in shaping the semiconductor landscape.