Microarchitecture

JD Retail Technology

Dec 19, 2023 · Fundamentals

Overview of CPU Architecture, Performance Trends, and Their Impact on Software Development

This article reviews recent decades of CPU performance improvements and semiconductor process advances, explains current CPU architectures, instruction set evolution, and how these trends influence software development practices, including parallelism, SIMD, multithreading, and power‑efficiency considerations.

CPU architectureInstruction setMicroarchitecture

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Overview of CPU Architecture, Performance Trends, and Their Impact on Software Development

Architects' Tech Alliance

Dec 4, 2023 · Fundamentals

Comprehensive Overview of CPU Architecture, Components, and Operation

The article provides a comprehensive overview of CPU architecture, covering the distinction between x86 and non‑x86 processors, packaging types, internal components such as the IHS, TIM, die and interposer, the execution pipeline of a Core i7, cache hierarchy, performance metrics, and common cache replacement algorithms.

CPUCacheComputer Architecture

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Comprehensive Overview of CPU Architecture, Components, and Operation

IT Services Circle

Nov 22, 2023 · Fundamentals

Key Evolution Points of CPUs: Process Technology, Integration, Memory Controllers, PCIe, and Microarchitecture

The article outlines the major milestones in CPU development—including shrinking process nodes, increasing integration of components, evolving memory controller standards, the progression of PCIe generations, and micro‑architectural enhancements such as larger caches and hybrid core designs—providing a concise historical overview for readers.

CPUHardware fundamentalsIntegration

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Key Evolution Points of CPUs: Process Technology, Integration, Memory Controllers, PCIe, and Microarchitecture

IT Services Circle

Nov 1, 2023 · Fundamentals

Understanding Intel CPU Naming Rules, Generations, and Microarchitecture

This article explains Intel's CPU naming conventions, generation identifiers, SKU and suffix meanings, details the evolution of Intel processor generations from Haswell to Raptor Lake Refresh, and examines the internal microarchitecture of a Kaby Lake i5‑7200U, including its die layout and core components.

CPUHardwareIntel

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Understanding Intel CPU Naming Rules, Generations, and Microarchitecture

Refining Core Development Skills

Oct 31, 2023 · Fundamentals

Understanding Intel CPU Naming Rules, Generations, and Microarchitecture (i5-7200U Example)

This article explains Intel's CPU naming conventions, the meaning of each part of a processor model string, the evolution of CPU generations from Haswell to Raptor Lake Refresh, and the internal micro‑architecture of a Kaby Lake i5‑7200U, illustrated with die diagrams and code examples.

CPUHardwareIntel

0 likes · 14 min read

Understanding Intel CPU Naming Rules, Generations, and Microarchitecture (i5-7200U Example)

OPPO Kernel Craftsman

Jul 7, 2023 · Fundamentals

Analysis of Arm's 2023 Cortex‑X4, A720, and A520 Microarchitectures

Arm’s 2023 processor lineup—Cortex‑X4, A720, and A520—introduces a 15% performance boost, 20‑22% efficiency gains, a 64‑bit‑only Armv9.2 ISA with QARMA3 PAC, larger caches, expanded decode and execution resources, and a DSU120 module supporting up to 14 cores and 32 MiB L3.

A520A720ARM

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Analysis of Arm's 2023 Cortex‑X4, A720, and A520 Microarchitectures

OPPO Kernel Craftsman

Feb 3, 2023 · Fundamentals

Analysis of Armv9 Microarchitectures: A710, A715, and A510

The article examines Armv9’s A710, A715, and A510 cores, detailing their microarchitectural tweaks—branch predictor expansion, dispatch width changes, SVE2 support, and 64‑bit‑only design—while highlighting modest performance and energy gains, code‑compatibility shifts, and evolving core‑count configurations in modern Snapdragon and MediaTek SoCs.

ARMArmv9CPU architecture

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Analysis of Armv9 Microarchitectures: A710, A715, and A510

vivo Internet Technology

Mar 10, 2021 · Fundamentals

CPU Performance Optimization Using Top‑Down Micro‑architecture Analysis (TMAM)

The article demonstrates how Top‑down Micro‑architecture Analysis Methodology (TMAM) can quickly pinpoint CPU bottlenecks—such as front‑end, back‑end, and bad speculation stalls—in a simple C++ accumulation loop, and shows that applying targeted compiler, alignment, and branch‑prediction optimizations reduces runtime by roughly 34 % while increasing retiring slots.

C++CPU performanceMicroarchitecture

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CPU Performance Optimization Using Top‑Down Micro‑architecture Analysis (TMAM)

Architects' Tech Alliance

Nov 25, 2020 · Fundamentals

In‑Depth Look at AMD’s Zen 3 Core Architecture and Performance

The article provides a comprehensive technical analysis of AMD’s Zen 3 (Ryzen 5000) microarchitecture, covering its chiplet layout, cache hierarchy, front‑end redesign, integer and floating‑point units, load/store improvements, security features, and overall performance gains compared with Zen 2.

AMDCPU architectureChiplet

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In‑Depth Look at AMD’s Zen 3 Core Architecture and Performance

Architects' Tech Alliance

Sep 28, 2020 · Fundamentals

In‑Depth Analysis of Loongson GS464E CPU Architecture and Performance

This article provides a comprehensive technical review of the Chinese Loongson GS464E processor, covering its micro‑architectural design choices, instruction‑fetch and out‑of‑order execution units, cache hierarchy, benchmark results, manufacturing details, and the challenges it faces in competing with mainstream Intel and AMD CPUs.

CPU architectureGS464ELoongson

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In‑Depth Analysis of Loongson GS464E CPU Architecture and Performance

Architects' Tech Alliance

Feb 20, 2017 · Fundamentals

A Comprehensive History of Intel and AMD CPUs

This article provides a detailed chronological overview of the rivalry between Intel and AMD, covering their shared origins, early collaborations with IBM, legal battles, the rise of AMD’s Athlon and 64-bit processors, Intel’s Tick‑Tock strategy, and the evolving market dynamics that shaped modern CPU architecture.

AMDCPUComputer Architecture

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A Comprehensive History of Intel and AMD CPUs