Instruction Set Architecture

Architects' Tech Alliance

Feb 11, 2024 · Fundamentals

Overview of Modern Processor Instruction Set Architectures: x86, ARM, and RISC‑V

This article provides a comprehensive overview of contemporary processor instruction set architectures, comparing CISC‑based x86 with RISC‑based ARM and RISC‑V, discussing their design philosophies, historical evolution, advantages, disadvantages, and the current landscape of domestic and international CPU development.

ARMCISCComputer Architecture

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Overview of Modern Processor Instruction Set Architectures: x86, ARM, and RISC‑V

Architects' Tech Alliance

Jun 19, 2022 · Fundamentals

Introduction to the RISC‑V Open Instruction Set Architecture

This article provides a comprehensive overview of RISC‑V, covering its open‑source ISA philosophy, historical development, RISC versus CISC design trade‑offs, modular extensions, basic integer instruction set, register file, common extensions such as M, F, D, C, and examples of commercial implementations, illustrating why RISC‑V has become a leading architecture for modern processors.

Computer ArchitectureHardwareInstruction Set Architecture

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Introduction to the RISC‑V Open Instruction Set Architecture

Architects' Tech Alliance

Apr 2, 2021 · Fundamentals

MIPS Open Instruction Set (Release 6) Initiative and Comparison with RISC‑V

The article outlines Wave Computing’s 2018 decision to open the MIPS Release 6 instruction set, describes the evolution and product lines of MIPS, compares the open‑source licensing and ecosystem of MIPS with RISC‑V, and discusses market adoption, commercial models, and future challenges.

Instruction Set ArchitectureMIPSOpen ISA

0 likes · 9 min read

MIPS Open Instruction Set (Release 6) Initiative and Comparison with RISC‑V

Architects' Tech Alliance

Mar 15, 2021 · Fundamentals

Understanding RISC‑V and Open‑Source Processors: Clarifying Misconceptions and Architectural Basics

This article clarifies common misunderstandings about RISC‑V and open‑source processors by explaining the distinction between instruction set specifications and implementations, the openness of the ISA, commercial versus open‑source micro‑architectures, and the geopolitical aspects of RISC‑V adoption.

Hardware fundamentalsInstruction Set ArchitectureRISC-V

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Understanding RISC‑V and Open‑Source Processors: Clarifying Misconceptions and Architectural Basics

Architects' Tech Alliance

Jan 24, 2021 · Fundamentals

RISC‑V Instruction Set Architecture: Background, Technical Features, Ecosystem, and Industry Applications

The article provides a comprehensive overview of RISC‑V, covering its origins amid trade‑war pressures, open‑source technical characteristics, growing global and Chinese ecosystem, comparisons with ARM and x86, and its emerging role in low‑power, customizable chips for IoT and AI applications.

AIInstruction Set ArchitectureIoT

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RISC‑V Instruction Set Architecture: Background, Technical Features, Ecosystem, and Industry Applications

Architects' Tech Alliance

Jan 18, 2021 · Fundamentals

RISC‑V: A Lightweight Instruction Set for the Heterogeneous IoT Era

The article introduces three major instruction‑set families—CISC (x86), RISC (ARM) and the ultra‑lightweight RISC‑V—explaining how RISC‑V, as the fifth‑generation RISC architecture, balances data throughput and speed, making it an ideal, self‑controlled solution for China’s AI and IoT development despite its still‑growing ecosystem.

AIHardware fundamentalsInstruction Set Architecture

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RISC‑V: A Lightweight Instruction Set for the Heterogeneous IoT Era

Architects' Tech Alliance

Aug 16, 2020 · Fundamentals

Overview of Recent IT Hot Topics: Docker Service Terms, ARM Acquisition, and the Chinese Domestic CPU Landscape

The article reviews three major IT events—Docker's new service terms restricting entities on the US Commerce Department list, Nvidia's potential ARM acquisition and its impact on AI and supercomputing, and Intel's latest CPU and GPU technologies—while also explaining CPU fundamentals, CISC vs. RISC architectures, and the current state of China's domestic processor industry.

ARMDomestic CPUsHardware

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Overview of Recent IT Hot Topics: Docker Service Terms, ARM Acquisition, and the Chinese Domestic CPU Landscape

Architects' Tech Alliance

Jun 2, 2019 · Fundamentals

MIPS Goes Open Source: Wave Computing’s Strategy and Industry Implications

Wave Computing announced the open‑source release of the MIPS ISA and its R6 core in early 2019, positioning MIPS as a commercial‑ready alternative to RISC‑V while addressing ecosystem challenges, patent issues, and market dynamics in China and beyond.

AIInstruction Set ArchitectureMIPS

0 likes · 10 min read

MIPS Goes Open Source: Wave Computing’s Strategy and Industry Implications