hardware design

NetEase Cloud Music Tech Team

Feb 2, 2024 · Fundamentals

Apple Vision Pro: Hardware Overview, Spatial Design Principles, and Application Scenarios

Apple’s Vision Pro, a head‑mounted display launched in early 2024, combines a curved 3‑D glass front, dual‑eye micro‑OLED screens, M2 and R1 chips, extensive cameras and sensors, and a breathable headband to deliver low‑latency mixed reality via VisionOS’s windows, volumes and spaces, while emphasizing familiar UI, ergonomics, privacy through on‑device Optic ID, and enabling novel experiences such as immersive music‑app environments.

Apple Vision ProMixed RealitySpatial Computing

0 likes · 20 min read

Apple Vision Pro: Hardware Overview, Spatial Design Principles, and Application Scenarios

Architects' Tech Alliance

Mar 9, 2023 · Artificial Intelligence

In‑Depth Analysis of Tesla D1 Processor and Dojo Architecture

This article provides a comprehensive technical review of Tesla's D1 AI processor and Dojo super‑computer architecture, covering its data‑flow near‑memory design, RISC‑V‑like instruction set, matrix compute units, chiplet packaging, power‑management, cooling solutions, and the associated software compilation ecosystem.

AI chipCompilation EcosystemDojo Architecture

0 likes · 23 min read

In‑Depth Analysis of Tesla D1 Processor and Dojo Architecture

IT Services Circle

Nov 18, 2022 · Fundamentals

How Steve Wozniak Single‑Handedly Built the First Complete Computer System (Apple I)

The article recounts how Steve Wozniak, inspired by the Homebrew Computer Club in 1975, single‑handedly designed and built the Apple I computer using a Motorola 6800 CPU, 4 KB memory, a BASIC interpreter and a machine‑language monitor, illustrating the challenges of creating a complete system in the 1970s.

Apple IComputer HistorySteve Wozniak

0 likes · 6 min read

How Steve Wozniak Single‑Handedly Built the First Complete Computer System (Apple I)

Architects' Tech Alliance

Nov 13, 2022 · Fundamentals

Overview of Programmable Logic Devices (PLD), FPGA, and CPLD: History, Types, Architecture, and Development Tools

This article provides a comprehensive introduction to programmable logic devices, covering their origins, classification, development history, internal architectures of CPLD and FPGA, and the essential EDA tools and IP cores needed for modern digital hardware design.

CPLDEDAFPGA

0 likes · 22 min read

Overview of Programmable Logic Devices (PLD), FPGA, and CPLD: History, Types, Architecture, and Development Tools

Alibaba Cloud Infrastructure

Jul 5, 2022 · Fundamentals

High‑Performance Chiplet and Interconnect Architectures: Insights from the HiPChips Workshop at ISCA 2022

The HiPChips workshop at ISCA 2022 gathered leading academia and industry experts to discuss the motivations, recent research breakthroughs, technical challenges, and ecosystem efforts surrounding high‑performance chiplet and interconnect architectures for future computing systems.

ChipletComputer ArchitectureHigh Performance Computing

0 likes · 10 min read

High‑Performance Chiplet and Interconnect Architectures: Insights from the HiPChips Workshop at ISCA 2022

Architects' Tech Alliance

May 2, 2022 · Fundamentals

3D Chip Stacking Technologies Transform Computing: AMD Zen 3, Graphcore Bow AI, and Intel Ponte Vecchio

The article explains how 3D chip stacking—illustrated by AMD's Zen 3 3D V‑Cache, Graphcore's Bow AI accelerator, and Intel's Ponte Vecchio—overcomes physical limits of transistor scaling, boosts performance, and reshapes high‑performance and AI computing architectures.

3D stackingAI acceleratorCPU architecture

0 likes · 10 min read

3D Chip Stacking Technologies Transform Computing: AMD Zen 3, Graphcore Bow AI, and Intel Ponte Vecchio

Architects' Tech Alliance

Mar 19, 2022 · Fundamentals

Chiplet Technology: Trends, Benefits, and Challenges in Semiconductor IP

The article explains how chiplet technology, as a modular semiconductor IP solution, reduces design cost and time, expands market opportunities, and faces challenges such as standardization, packaging testing, and software integration, while outlining its market outlook and impact on business models.

ChipletIPIndustry Trends

0 likes · 9 min read

Chiplet Technology: Trends, Benefits, and Challenges in Semiconductor IP

Architects' Tech Alliance

Nov 18, 2021 · Fundamentals

Challenges and Future Directions in Computing System Design: Logic, Memory, and Interconnect

The article reviews the accelerating data explosion and its impact on computing hardware, analyzes the limits of traditional scaling in logic, memory, and interconnect, and proposes specialized ICs, design reuse, 3‑D integration, new memory technologies, and optical interconnects as viable paths to sustain performance growth.

Memory TechnologySemiconductorcomputing

0 likes · 30 min read

Challenges and Future Directions in Computing System Design: Logic, Memory, and Interconnect

Architects' Tech Alliance

Oct 16, 2021 · Fundamentals

The New Golden Age of Computer Architecture: Trends, Challenges, and Opportunities

This article reviews the historical evolution of computer architecture, analyzes the end of Dennard scaling and Moore's Law, discusses domain‑specific architectures, open ISAs like RISC‑V, security vulnerabilities, and emerging opportunities such as agile hardware development and specialized accelerators.

Computer ArchitecturePerformance ScalingRISC-V

0 likes · 41 min read

The New Golden Age of Computer Architecture: Trends, Challenges, and Opportunities

Architects' Tech Alliance

Jul 13, 2020 · Fundamentals

FPGA Technology Overview, Market Trends, and Competitive Landscape

The article provides a comprehensive overview of FPGA technology, detailing its architecture, advantages over ASICs, current global market size, growth drivers such as 5G and AI, and the challenges and opportunities faced by domestic Chinese manufacturers in a market dominated by Xilinx and Intel.

5GAIFPGA

0 likes · 19 min read

FPGA Technology Overview, Market Trends, and Competitive Landscape

Architects' Tech Alliance

Mar 12, 2020 · Fundamentals

Overview of PCIe 4.0 and 5.0 Specifications and Hardware Design Challenges

The article explains the development of PCIe 4.0 and 5.0 specifications, their performance improvements, adoption timelines, and the hardware design challenges such as channel attenuation and signal reflections that engineers must address to support the higher 32 GT/s data rates.

High-Speed InterfacesPCI ExpressPCIe

0 likes · 7 min read

Overview of PCIe 4.0 and 5.0 Specifications and Hardware Design Challenges

Architects' Tech Alliance

Jan 2, 2020 · Fundamentals

Comprehensive Overview of FPGA Technology: History, Architecture, Development Process, and Applications

This article provides a comprehensive overview of FPGA technology, covering its definition, historical development, major manufacturers, internal architecture, design flow, usage steps, and typical application scenarios in fields such as AI, telecommunications, and cloud computing.

ASICFPGAcloud-computing

0 likes · 13 min read

Comprehensive Overview of FPGA Technology: History, Architecture, Development Process, and Applications

Architects' Tech Alliance

Jul 27, 2019 · Fundamentals

A Comprehensive Overview of Chip Design Process and EDA Toolchain

The article provides a detailed, English-language overview of the entire integrated circuit design flow—from architecture and algorithm selection through RTL coding, verification, synthesis, layout, and sign‑off—highlighting the roles, tools, and challenges faced by engineers in modern ASIC and FPGA development.

ASICEDAFPGA

0 likes · 29 min read

A Comprehensive Overview of Chip Design Process and EDA Toolchain

DataFunTalk

Jul 22, 2019 · Artificial Intelligence

Key Hardware Design Considerations for Autonomous Vehicles

The article examines autonomous vehicle hardware, covering aesthetic design, sensor placement for full 360° vision, weather impacts on perception, performance versus power consumption, cooling solutions, and environmental robustness such as vibration, temperature, humidity, salt corrosion, and electromagnetic interference, while highlighting modular sensor modules and innovative concepts like Zoox's direction‑free chassis.

Performanceautonomous vehicleshardware design

0 likes · 12 min read

Key Hardware Design Considerations for Autonomous Vehicles

NetEase Game Operations Platform

May 25, 2019 · Fundamentals

Building a Gongfu Tea Robot: Embedded Development Guide and Sample Code

This article presents a step‑by‑step guide to designing and building a Gongfu tea‑making robot, covering embedded development basics, hardware modularization, controller design, platform comparisons, power supply considerations, and complete Python code for servo control and action sequencing.

ArduinoEmbedded SystemsPython

0 likes · 15 min read

Building a Gongfu Tea Robot: Embedded Development Guide and Sample Code

Architects' Tech Alliance

May 20, 2019 · Fundamentals

Comprehensive Overview of FPGA: Introduction, History, Architecture, Development Flow, and Application Scenarios

This article provides a detailed introduction to Field‑Programmable Gate Arrays (FPGA), covering their definition, evolution, major vendors, internal architecture, design and programming workflow, usage in data‑center and telecom, and typical application scenarios such as AI and high‑performance computing.

ASICFPGAdata center acceleration

0 likes · 13 min read

Comprehensive Overview of FPGA: Introduction, History, Architecture, Development Flow, and Application Scenarios