Overview of NVIDIA DOCA and SmartNIC/DPU Technologies

Reference: "Future Network: SmartNIC DPU Technology Whitepaper".

To enable independent software vendors, service providers, and academia to adopt DPU, NVIDIA developed DOCA (Data Center on a Chip Architecture), a library and service framework built on drivers, combining open‑source and proprietary components, abstracting DPU programming similarly to CUDA for GPUs.

DOCA together with BlueField DPU provides a comprehensive open development platform delivering breakthrough network, security, and storage performance.

BlueField separates infrastructure service domain from workload domain, significantly improving application and server performance, security, and efficiency, and supplies all tools needed for secure, accelerated data‑center development.

DOCA software consists of an SDK and runtime. The DOCA SDK offers industry‑standard open APIs and frameworks, including DPDK and SPDK for networking and storage, and integrates NVIDIA acceleration packages to simplify offloading. DOCA services expose standard I/O interfaces for infrastructure virtualization and isolation.

The SDK supports multiple operating systems and distributions, providing drivers, libraries, tools, documentation, and sample applications. The runtime includes tools for configuring, deploying, and orchestrating containerized services across hundreds or thousands of DPUs in a data center.

Key SDK components include:

Industry‑standard APIs: DPDK, SPDK, P4, Linux Netlink;

Network acceleration SDK: NVIDIA Accelerated Switching and Packet Processing (ASAP) SDN, virtual VirtIO, P4, 5G‑related 5T, Firefly time synchronization;

Security acceleration SDK: inline encryption, deep packet inspection;

Storage acceleration SDK: storage emulation/virtualization, encryption, compression;

RDMA acceleration SDK: Unified Communication & Collaboration (UCC), UCX, RDMA verbs, GPU‑Direct, etc.;

Management SDK: deployment, provisioning, service orchestration;

User‑space and kernel components.

The Arm‑based DPU can share accelerators with host x86 applications; using DOCA, both x86 host applications and Arm‑based DPU applications can access accelerated data paths and underlying accelerators.

DPU programming frameworks are rapidly evolving. Besides DOCA, many frameworks exist, such as a generic five‑layer model covering business abstraction, application service abstraction, compute engine abstraction, DSA operation abstraction, and DSA device abstraction.

Current SmartNIC hardware architectures fall into three categories—FPGA‑based, MP‑based, and ASIC‑based—each with trade‑offs in performance, cost, and power.

Numerous SmartNIC programming frameworks have emerged, including ClickNP, Floem, FlexNIC, sPIN, NICA, and DOCA; co‑design of hardware and software, task scheduling, and partitioning are crucial for maximizing communication and compute capabilities.

RDMA enables direct memory‑to‑memory data transfer between servers without CPU involvement, improving performance and offloading CPU cycles.

RoCE encapsulates InfiniBand transport over Ethernet; RoCE v1 uses a dedicated Ethernet type (0x8915), while RoCE v2 runs over UDP with a specific port, allowing routing over IP layer‑3.

RoCE v2 packets carry UDP source ports as opaque flow identifiers, enabling network devices to optimize forwarding (e.g., ECMP) while remaining transparent to the protocol header.

GPUDirect RDMA provides a direct path for GPU‑to‑GPU communication, bypassing system memory copies. It leverages InfiniBand or RoCE adapters (e.g., ConnectX) to allow RDMA applications to access peer memory buffers directly.

For further details, see the original whitepaper which discusses SmartNIC/DPU features, hardware and programming architectures, industry trends, use cases, and testing technologies.