Intel Unveils Sunny Cove 10 nm CPU Architecture and Foveros 3D Stacking Technology at Architecture Day 2018

During Intel's Architecture Day 2018 event, the company revealed several major product announcements, the most important being the upcoming 10 nm CPU based on the next‑generation Sunny Cove architecture, slated for shipment in the second half of 2019.

The event disclosed Sunny Cove details and a roadmap for core products from 2019 to 2021, separating the roadmap into general‑purpose and specialized product branches.

Next‑Generation Sunny Cove Architecture

With Moore's Law reaching its limits, Intel faced significant delays in its 10 nm process, pushing back plans originally set for a 2‑3‑year cadence. Since the 2015 Skylake launch, Intel has been iterating on 14 nm, nearly abandoning the 10 nm effort, but the Sunny Cove improvements confirm the 10 nm rollout.

Sunny Cove, built on 10 nm, is expected to ship in 2019, delivering higher single‑thread performance, new instructions, and improved scalability. Willow Cove (2020) and possibly Golden Cove (future) will also target 10 nm or 7 nm, adding more cores, AI features, and security enhancements.

Key characteristics of Sunny Cove include:

Enhanced CPU micro‑architecture with higher parallelism.

Reduced latency through new algorithms.

Larger critical caches to improve workload performance.

Specific extensions such as AES and SHA‑NI for faster encryption.

Next‑generation deeper, wider, smarter processors.

Deeper: Built on 10 nm, Sunny Cove expands L1 cache by 50 % compared to Skylake and offers larger L2 caches depending on market positioning, enabling more parallel instruction execution with lower latency.

Wider: The processor widens execution resources to five‑wide dispatch, ten execution ports, and doubles L1 bandwidth, adding SIMD, Shuffle, and LEA units to vector and integer pipelines.

Smarter: Support for AVX‑512 instructions, including extensions for neural‑network workloads, improves branch prediction and reduces latency.

Sunny Cove also introduces new encryption and compression instructions with up to 75 % performance gains over previous generations.

Intel's low‑power Atom roadmap proceeds more slowly; the 2019 Atom micro‑architecture, named Tremont, focuses on single‑thread performance, battery life, and server networking, followed by Gracemont.

Foveros 3D Stacking Technology

Alongside Sunny Cove, Intel announced its industry‑first logic‑chip 3D‑stacking technology, Foveros. Previously used in storage chips, applying it to CPUs poses thermal and verification challenges.

Foveros stacks two independent dies in a single package using an active interposer, allowing high‑performance cores built on 10 nm to be combined with I/O components (USB, Wi‑Fi, Ethernet, PCIe) that can use older, lower‑cost processes such as 14 nm or 22 nm.

This approach yields higher density and smaller chip area, enabling heterogeneous integration of core and Atom CPUs. Compared with Intel's EMIB (2D) solution, Foveros provides a true 3D chip‑stacking capability, and both technologies can coexist.

Intel plans to ship Foveros‑based products in the second half of 2019, initially using a 22FFL low‑power FinFET process with 10 nm compute units stacked on top.

The resulting hybrid x86 chip will combine a high‑performance Sunny Cove core with four low‑power Atom cores, similar to ARM’s big‑LITTLE approach, allowing the system to switch between cores based on workload.

Independent GPU 2020 Launch

Intel is discontinuing its 10th‑gen integrated graphics in favor of a new 11th‑gen (Gen11) GPU featuring 64 enhanced execution units—more than double the previous generation—and exceeding 1 TFLOP of compute performance.

The new GPU adopts tile‑based rendering to reduce memory bandwidth, includes dual video decoders and an encoder, redesigns the HEVC/H.265 encoder, and supports 4K/8K video, HDR, and AMD FreeSync.

It will launch alongside 10 nm processors in 2019 and is expected to pair with Sunny Cove cores; Intel also announced a discrete GPU architecture codenamed “Xe” slated for 2020.

Deep Learning Reference Stack

Architecture Day also introduced a Deep Learning Reference Stack, an open‑source, high‑performance software stack optimized for Intel Xeon Scalable platforms and built for cloud‑native environments.

The stack simplifies integration of components such as Clear Linux, Kubernetes, Docker/Kata containers, Intel MKL‑DNN, Python, TensorFlow, and KubeFlow, enabling developers to prototype quickly while retaining flexibility for custom solutions.

For further technical details, readers are directed to the original links and Intel’s high‑performance computing community.