BestHub
search
Sign in
Tag

SuperFin

1 views collected around this technical thread.

Architects' Tech Alliance
Architects' Tech Alliance
Aug 15, 2020 · Fundamentals

Intel’s 10nm Process Delays, + Naming Scheme, and the Path to Future Nodes

The article examines Intel’s delayed 10nm rollout, the confusing + naming hierarchy across its 14nm and 10nm generations, the performance trade‑offs of Cannon Lake, Ice Lake and Tiger Lake, and how the company’s shift to EUV and SuperFin aims to restore its manufacturing leadership.

10nmFinFETIntel
0 likes · 9 min read
Intel’s 10nm Process Delays, + Naming Scheme, and the Path to Future Nodes
Architects' Tech Alliance
Architects' Tech Alliance
Aug 15, 2020 · Fundamentals

Intel Unveils 10nm SuperFin, Willow Cove, Tiger Lake, Xe Graphics, Ice Lake, Sapphire Rapids, Alder Lake and Hybrid Bonding Technologies

Intel's Architecture Day showcased a suite of innovations—including 10nm SuperFin transistors, Willow Cove and Tiger Lake CPUs, Xe graphics families, Ice Lake and Sapphire Rapids data‑center processors, Alder Lake hybrid architecture, hybrid bonding packaging, and the upcoming oneAPI Gold release—highlighting the company's multi‑dimensional roadmap for performance, efficiency, and AI acceleration.

10nmCPU architectureHybrid bonding
0 likes · 17 min read
Intel Unveils 10nm SuperFin, Willow Cove, Tiger Lake, Xe Graphics, Ice Lake, Sapphire Rapids, Alder Lake and Hybrid Bonding Technologies