Huawei Ascend 950 NPU Architecture Deep Dive – Full Whitepaper Inside

The article provides a detailed technical analysis of Huawei's Ascend 950 NPU series, covering its one‑chip dual‑structure for training and inference, SIMD/SIMT dual‑mode compute, ultra‑fine memory granularity, PD separation, native FP4 support, a high‑bandwidth 2.0 interconnect, and a fully self‑developed yet CUDA‑compatible ecosystem.

AI acceleratorAscend 950FP4

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Huawei Ascend 950 NPU Architecture Deep Dive – Full Whitepaper Inside

JavaGuide

Apr 27, 2026 · Artificial Intelligence

DeepSeek V4 Slashes Prices by 75% – Real‑World Claude Code Test with 4M Tokens

DeepSeek V4’s pricing fell 75% overnight, making the V4‑Pro and V4‑Flash models dramatically cheaper than competing AI services; the article details the new rates, compares them with other providers, shows two Claude Code case studies consuming nearly 4 million tokens, and explains how domestic Ascend 950 hardware enables the discount.

AI pricingAscend 950Claude Code

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DeepSeek V4 Slashes Prices by 75% – Real‑World Claude Code Test with 4M Tokens

Architects' Tech Alliance

Apr 27, 2026 · Artificial Intelligence

Why Huawei’s Ascend 950 PR and DT Have Different Names – The Technical Rationale

Huawei’s Ascend 950 series splits a single die into two variants—PR (Prefill & Recommendation) optimized for compute‑intensive inference with low cost, and DT (Decode & Training) tuned for memory‑bandwidth‑heavy generation and training—illustrating a scenario‑driven, P/D‑separated architecture that maximizes efficiency.

AI ChipAscend 950Decode

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Why Huawei’s Ascend 950 PR and DT Have Different Names – The Technical Rationale