Why the NDRC’s ‘Table‑Slap’ Demands Domestic AI Models Use Home‑Made Chips
The NDRC’s May 22 directive urges Chinese large‑language models to run on domestically produced AI chips, citing US export controls, rising domestic chip market share, three leading chip solutions, and a 2026 verification timeline that treats compute infrastructure as a national utility.
Policy directive
On May 22, the National Development and Reform Commission (NDRC) spokesperson Li Chao said, “Guide domestic large models to intensify adaptation to domestic compute chips, ensuring self‑control, benevolent development, and stable progress.” The wording stresses guidance rather than mere encouragement , turning chip adaptation from an optional choice into a mandatory requirement.
Why the urgency?
In the past two years Chinese large‑model startups such as Wenxin YiYan, Tongyi Qianwen and DeepSeek have surged from hundreds of billions to trillions of parameters, yet the majority still run on foreign GPUs. Repeated US export restrictions on Nvidia H100/H200 mean today’s supply could disappear tomorrow, threatening the continuity of even the strongest models.
Domestic chip market progress
2025 AI‑accelerator shipments in China are projected at 1.65 million units, giving domestic manufacturers a 41 % market share for the first time, while Nvidia’s share fell from 70 % in 2024 to 55 %.
Current migration friction
Many vendors still prioritize Nvidia H100 because the cost of migrating existing workloads to new hardware is perceived as too high.
Three leading domestic chips
Huawei Ascend 950PR : First Ascend chip with self‑designed HBM, 1 PFLOPS FP8 compute, 112 GB memory, 2 TB/s interconnect. Benchmarks show a 2.87× performance advantage over Nvidia H100. Annual shipment target has been raised from 700 k to 1.5‑2 million units, with orders from ByteDance, Alibaba and Meituan valued at roughly ¥2 billion per set.
Cambricon Siyuan 590 : Inference‑oriented, delivers about 80 % of Nvidia A100 performance while consuming 15 % less power. Q1 2026 revenue reached ¥2.885 billion (↑160 % YoY) and net profit ¥1.013 billion (↑185 % YoY). Order backlog jumped from ¥0.01 billion at the end of 2025 to ¥3.96 billion.
HaiGuang DCU : Claims compatibility with 365 mainstream large models (≈99 % of non‑closed‑source models), including DeepSeek, Qwen 3, HunYuan and Zhipu. Q1 2026 revenue was ¥4.034 billion (↑68 % YoY) with a ¥20.19 billion order backlog.
Three routes to replace CUDA
HaiGuang – Compatibility route : Emphasises “road‑building” – any model can run with minimal changes, aiming to retain users by lowering migration cost.
Cambricon – CUDA‑compatible route : Uses the self‑developed Bangware stack to cut migration effort by ~70 % and offers “Day 0 adaptation” – new models run on Cambricon chips on the day of release.
Huawei Ascend – Non‑compatible route : Builds a full‑stack ecosystem from chip to supernode to framework, accepting higher migration cost for the strongest autonomy and suitability for training ultra‑large models.
All three strategies share the ultimate goal of breaking dependence on Nvidia’s CUDA ecosystem.
Compute network as national infrastructure
In early 2024 daily token calls were about 1 trillion; by March 2026 they are projected to reach 140 trillion , a thousand‑fold increase in two years. The State Council’s recent “six‑network” plan places the “compute network” on the same strategic level as water and electricity, signalling that AI compute is a national essential, not a bonus.
2026 – the verification year
The government expects three concrete outcomes in 2026:
Chip manufacturers must demonstrate reliable delivery capacity (on‑time, on‑quantity supply).
Model providers must show effective adaptation, i.e., models run smoothly and efficiently on domestic chips.
Application teams must prove real‑world scenario deployment that creates tangible value.
Success will prove that a domestically controlled AI compute stack can sustain China’s AI ambitions.
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