Understanding Server CPU Memory Controllers: Channels, DIMM Types, and ECC

Memory Channels and Bandwidth

The Skylake server CPU includes two Integrated Memory Controllers (IMC), each with a DDR PHY that bridges the CPU and DDR4 DIMMs. Each PHY provides three DDR4 channels, giving a total of six channels and supporting up to twelve DIMM slots.

Bandwidth per channel is calculated as 2666 MT/s × 8 bytes = 21.33 GB/s; with six channels the aggregated theoretical bandwidth reaches 128 GB/s.

DRAM
6 channels of DDR4, up to 2666 MT/s
RDIMM and LRDIMM
bandwidth of 21.33 GB/s
aggregated bandwidth of 128 GB/s

DIMM Module Specifications

DIMM (Dual In‑Line Memory Module) is the standard memory form factor. Variants include:

UDIMM : Unbuffered DIMM, used mainly in desktop PCs.

SO‑DIMM : Small‑Outline DIMM for laptops.

RDIMM : Registered DIMM with a register chip, allowing higher capacity and frequency, common in servers.

LRDIMM : Load‑Reduced DIMM that adds a data buffer for even larger capacities.

Images illustrate typical UDIMM, server RDIMM, and SO‑DIMM modules.

ECC Memory

ECC (Error‑Checking and Correcting) memory adds an extra chip to detect and correct bit‑flips, providing 72‑bit wide transfers (64 data bits + 8 ECC bits). While slightly more expensive and slower (~2% latency), ECC is essential for server reliability.

Summary

Server CPUs differ from consumer CPUs by supporting more memory channels (six or more), higher‑capacity RDIMM/LRDIMM modules, and mandatory ECC, all of which contribute to greater bandwidth and reliability for enterprise workloads.