Overview of AI Chip Development Paths: CPU, GPU, FPGA, ASIC, and Neuromorphic Chips

1. Traditional CPU

Since the 1960s the CPU has been the core of computers; its basic operation (controller + arithmetic logic unit) has remained stable while implementation details have evolved. The ALU performs all calculations, while other units ensure sequential instruction execution. Increasing clock frequency improves speed, but for deep‑learning workloads that require massive data parallelism, CPUs hit power and performance limits.

2. Parallel‑Accelerating GPU

GPUs were the first processors designed for parallel acceleration. Unlike CPUs, GPUs contain many ALUs and are optimized for data‑parallel tasks, making them far more efficient for graphics and deep‑learning algorithms. The performance gap between CPU and GPU can be tens to thousands of times for parallel workloads.

GPU development can be divided into three generations: (1) pre‑1999 GPUs that only accelerated geometry processing; (2) 1999‑2005 GPUs that added programmable pipelines (e.g., GeForce256, Transform and Lighting); (3) post‑2006 GPUs that support general‑purpose programming via CUDA, OpenCL, etc.

Today GPUs are widely used by Google, Facebook, Microsoft, Twitter, Baidu, and automotive companies for image/video analysis, autonomous driving, and VR/AR. However, GPUs excel at training but are less efficient for inference on single inputs.

3. Semi‑Custom FPGA

FPGAs evolve from PAL, GAL, CPLD and allow users to program hardware logic via configuration files. They can perform both data‑parallel and task‑parallel computing, often completing specific operations in a single clock cycle, and they consume less power than ASICs for the same function.

Because FPGA logic is fixed after configuration, no instruction decoding is needed, which dramatically reduces energy per operation. Their flexibility makes them a bridge between general‑purpose CPUs/GPUs and fully custom ASICs.

4. Fully Custom ASIC

When deep‑learning algorithms stabilize, AI chips can be designed as ASICs to achieve optimal performance, power, and area. Existing general‑purpose GPUs/FPGA accelerate AI but have inherent limitations: (1) limited parallel advantage for inference, (2) fixed hardware architecture, and (3) lower energy efficiency compared with ASICs.

ASICs overcome these constraints by tailoring the silicon directly to the neural‑network workload.

5. Neuromorphic (Brain‑Inspired) Chip

Neuromorphic chips abandon the von Neumann architecture and adopt a neural‑morphous design, exemplified by IBM TrueNorth. They implement synapses as storage cells and neurons as compute units, using PCM (phase‑change memory) for mutable weights, achieving 70 mW power consumption for 4 096 cores built on a 28 nm process.

Source: Tsinghua University 2018 AI Chip Research Report

Note: The remainder of the original document contains promotional material for a New‑Year discount on a technical e‑book bundle and is omitted from the academic summary.