Fundamentals of Embedded Systems: Definitions, Architecture, Real‑Time Concepts, and Interface Technologies

Embedded System Basics

An embedded system is a dedicated computer built around a specific application, with customizable hardware and software to satisfy strict functional, reliability, cost, size, and power requirements. Its evolution can be divided into four stages: no‑OS, simple‑OS, real‑time OS, and Internet‑oriented.

System Composition

The system is organized into four layers: hardware, middleware (HAL/BSP), system software (RTOS, file system, GUI, network stack), and application software. The core hardware module consists of a microprocessor, power circuit, clock circuit, and memory. Cache sits between main memory and the processor core to reduce memory access latency.

Hardware Layers

Hardware layer: microprocessor, memory, generic I/O and specific I/O interfaces.

Middle layer (HAL/BSP): abstracts hardware from upper‑level software, providing a stable API.

System‑software layer: RTOS, file system, GUI, networking, and common components.

Application layer: programs built on top of the real‑time environment.

Real‑Time Systems

Real‑time systems must complete functions within defined time constraints. They are classified as hard (strict deadlines) or soft (occasional deadline misses tolerated). Scheduling strategies include pre‑emptive priority‑driven, non‑pre‑emptive, static table‑driven, and priority‑driven policies, handling periodic, aperiodic, and sporadic tasks.

Microprocessor Architectures

Two classic architectures are described: von Neumann (shared program‑data memory) and Harvard (separate program and data memories). Performance can be estimated by P = I × CPI × T, where I is instruction count, CPI is cycles per instruction, and T is clock period. Pipelining concepts and metrics such as throughput and pipeline fill time are also introduced.

Logic‑Circuit Foundations

Logic circuits are divided into combinational (output depends only on current inputs) and sequential (output also depends on stored state). Fundamental elements include NAND/NOR universal gates, decoders, flip‑flops, and timing considerations such as clock‑edge versus level triggering.

Bus and Signal‑Driving Basics

Buses provide common pathways for data, address, and control signals. Key parameters are width, frequency, and bandwidth (Bandwidth = Width × Frequency / 8). Types include ISA, PCI, I²C, SPI, and CAN, each with specific electrical and protocol characteristics.

Interface Technologies

Flash memory (NOR/NAND) – non‑volatile, block‑structured, with distinct read/write characteristics.

RAM families – SRAM (static, fast, high‑cost), DRAM (dynamic, requires refresh), SDRAM (synchronous), DDR/DDR‑2 (double‑data‑rate).

Peripheral buses – GPIO, A/D, D/A, UART, SPI, I²C, CAN, Ethernet, USB, WLAN, Bluetooth, IEEE‑1394, power interfaces.

Each interface description includes basic operation principles, typical pin assignments, and common usage scenarios.

Power Management

DC‑DC converters are categorized as linear regulators, switching regulators, and charge‑pump converters. Efficient power design involves selecting low‑power devices, high‑integration components, dynamic voltage/frequency scaling, and proper handling of unused pins to minimise static current consumption.