From Zero to Chip: Tencent’s Multi‑Year Journey in AI, FPGA, and Smart‑NIC Development

In early 2019, verification engineer Lynda joined Tencent only to discover that essential simulation tools, verification environments, and processes were missing, highlighting the high‑risk, high‑investment nature of chip development.

The team first explored FPGA as a low‑cost entry point, achieving superior image‑compression performance for QQ Photo and later accelerating AI inference workloads, delivering up to four‑times CPU performance at one‑third the cost.

Recognizing the limitations of FPGA, Tencent launched its own AI inference chip, "Penglai," in 2020, establishing a dedicated hardware lab that grew from a handful of engineers to a full‑scale R&D organization.

Building on Penglai’s success, the team designed the next‑generation AI chip "Zixiao," integrating HBM2e memory via 2.5D packaging, adding computer‑vision and video‑codec accelerators, and completing architecture, verification, and tape‑out within six months.

Parallelly, the video‑encoding chip "Canghai" was developed, winning the 2020 MSU codec competition with its custom hardware encoder "Yaichi," and later achieving a 30% higher compression ratio than industry bests.

To address cloud server networking bottlenecks, Tencent’s network platform created the smart‑NIC series: the FPGA‑based "ShuShan," the production‑grade "YinShan" with 2×100 Gbps ports, and the upcoming ASIC "XuanLing," a 7 nm chip designed to offload virtualization, networking, and storage tasks from the host CPU.

These hardware breakthroughs, driven by massive internal workloads and a desire to control the technology stack, have enabled Tencent to deliver high‑performance AI inference, video processing, and networking capabilities across its cloud and consumer services.