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memory-barrier

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Xiaokun's Architecture Exploration Notes
Xiaokun's Architecture Exploration Notes
Jan 24, 2020 · Fundamentals

Understanding Java volatile: Memory Semantics, Barriers, and Practical Examples

This article explains the purpose, usage scenarios, and memory semantics of Java's volatile keyword, demonstrates its behavior with code examples and memory barrier concepts, and summarizes how volatile ensures visibility and ordering across threads.

ConcurrencyMemory Modeljava
0 likes · 9 min read
Understanding Java volatile: Memory Semantics, Barriers, and Practical Examples
Xiaokun's Architecture Exploration Notes
Xiaokun's Architecture Exploration Notes
Jan 9, 2020 · Fundamentals

Why CPU Caches Matter: Levels, Coherence, and Memory Barriers

CPU caches, organized into L1‑L3 levels, accelerate memory access by exploiting locality, but their independent copies can cause data inconsistency across cores; coherence protocols such as MESI and memory‑barrier instructions ensure that reads and writes remain ordered and visible across all processors.

CPUCacheMESI
0 likes · 10 min read
Why CPU Caches Matter: Levels, Coherence, and Memory Barriers
Liulishuo Tech Team
Liulishuo Tech Team
Mar 5, 2019 · Fundamentals

Understanding Concurrency: From Hardware Mechanisms to Language-Level Barriers

This article explains concurrency fundamentals by examining hardware-level cache coherence, memory barriers, and lock mechanisms, then shows how Go's sync.Mutex and Java's volatile keyword implement these concepts to ensure atomicity, visibility, and ordering across multiple cores.

Cache CoherenceConcurrencyGo
0 likes · 8 min read
Understanding Concurrency: From Hardware Mechanisms to Language-Level Barriers
Qunar Tech Salon
Qunar Tech Salon
Dec 11, 2017 · Fundamentals

Why ReentrantLock Guarantees Memory Visibility: JMM, Happens‑Before, and Memory Barriers

This article explains how Java's ReentrantLock guarantees memory visibility for shared variables without using volatile, by leveraging the Java Memory Model's happens‑before guarantees, the lock's internal volatile state, and underlying CPU memory‑barrier instructions such as the LOCK prefix.

ConcurrencyHappens-BeforeMemory Model
0 likes · 10 min read
Why ReentrantLock Guarantees Memory Visibility: JMM, Happens‑Before, and Memory Barriers