Embedded Systems Interview Guide: Linux Thread Scheduling, STM32 Configurations, SPI, DMA, Synchronization, and Debugging
This article provides a comprehensive interview guide for embedded systems positions, covering Linux thread scheduling, single‑core CPU execution, STM32 chip specifications, SPI communication, DMA concepts, synchronization primitives, priority inversion solutions, debugging techniques, and software design considerations.
Introduction: The author shares an embedded systems interview guide, noting the popularity and attractive salaries of embedded positions.
Self‑introduction advice: Emphasize background, education, and embedded‑related projects.
Linux thread scheduling
The kernel selects the next thread based on priority and scheduling policy.
Runnable threads are kept in a scheduling queue.
When a CPU core is idle, the highest‑priority runnable thread is assigned.
Threads run until their time slice expires, they block, or they sleep.
Blocked or sleeping threads are removed from the run queue and later re‑awakened.
Single‑core CPU execution order
Threads are scheduled using a time‑slice round‑robin algorithm, which is pre‑emptive; the kernel can interrupt a running thread when its slice ends, it blocks, or a higher‑priority thread becomes ready.
Thread selection strategies
First‑Come‑First‑Served (FCFS)
Round‑Robin
Priority scheduling
Pre‑emptive scheduling
Shortest Job Next
STM32 chip configurations
Examples:
STM32F103: 72 MHz CPU, 64–128 KB Flash, 20–48 KB RAM.
STM32F407: 168 MHz CPU, 512 KB–1 MB Flash, 192–256 KB RAM.
STM32L432: 80 MHz CPU, 256–512 KB Flash, 64–128 KB RAM.
Typical STM32 development areas
Embedded system design (e.g., smart home, robotics).
IoT applications with cloud integration.
Peripheral control (LCD, touch, LEDs, etc.).
Data acquisition and processing.
Smart vehicle or drone control.
Driver development examples
Display drivers
Network interface drivers
Audio drivers
USB device drivers
Storage drivers
SPI communication
Four lines: SCLK, MOSI, MISO, SS. Typical speeds range from hundreds of kHz to tens of MHz.
SPI modes
Mode 0 (CPOL = 0, CPHA = 0)
Mode 1 (CPOL = 0, CPHA = 1)
Mode 2 (CPOL = 1, CPHA = 0)
Mode 3 (CPOL = 1, CPHA = 1)
DMA overview
Direct Memory Access transfers data between peripherals and memory without CPU intervention. Typical flow: configure controller, request transfer, automatic data movement, completion interrupt.
Synchronization primitives
Mutex
Semaphore
Condition variable
Barrier
Read‑Write lock
Lock contention and priority inversion
When a low‑priority task holds a lock, higher‑priority tasks may block. Solutions include priority inheritance, priority ceiling, and careful use of semaphores or mutexes.
Debugging techniques for user‑space and runtime errors
Use debuggers (gdb, lldb).
Insert logging statements.
Memory analysis tools (Valgrind).
Static analysis (Clang Static Analyzer).
Core dump inspection.
Visual debugging environments.
Assertions and exception handling.
Program memory layout
Code (text) segment
Data segment
BSS segment
Heap
Stack
Special segments (shared libraries, etc.)
Heap vs. Stack
Heap memory is allocated and freed manually using functions such as malloc() , new , free() , and delete , while stack memory is managed automatically by the compiler.
Deepin Linux
Research areas: Windows & Linux platforms, C/C++ backend development, embedded systems and Linux kernel, etc.
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