ByteDance’s 800G LPO & 224G SerDes Papers Reveal High‑Speed Hardware Breakthroughs

DesignCon 2024, the leading high‑speed communication and system design conference, was held in Santa Clara, USA, featuring papers on chip, PCB and system design.

ByteDance’s network engineering team had three papers selected.

Paper 1: 800G Linear Direct Drive Network System Design & Implementation

Background: LPO modules offer cost, power and latency advantages over traditional DSP modules but introduce system‑level challenges such as signal integrity, optical‑electrical link consistency, testability and operability.

Results: The paper analyzes LPO challenges, optimizes high‑speed channel design, demonstrates end‑to‑end signal integrity for single‑mode and multimode modules, and provides practical deployment recommendations.

Download: https://dcon24.mapyourshow.com/8_0/sessions/session-details.cfm?scheduleid=124

Paper 2: PCB Manufacturing Technology and Tolerance Control for 224G Channel

Background: Over the past two decades, SerDes rates have risen from 1 Gbps to >100 Gbps, with encoding shifting from NRZ to PAM4 and bandwidth expanding beyond 28 GHz. At 224 Gbps, lower loss, wider bandwidth, tighter impedance control, reduced crosstalk and skew are required, demanding advanced PCB manufacturing and tolerance control.

Results: The study evaluates how PCB line and via plating tolerances affect 224 Gbps channel performance, explores long‑reach topologies, and emphasizes the critical role of PCB technology in achieving high‑performance 224 Gbps links.

Download: https://dcon24.mapyourshow.com/8_0/sessions/session-details.cfm?scheduleid=169

Paper 3: 224G Ultra‑low Loss PCB Solution

Background: At 224 Gbps, loss requirements exceed the capabilities of PCB and materials used for 112 Gbps, prompting the need for next‑generation ultra‑low loss solutions.

Results: The authors propose a PCB built from modified PPO resin without reinforcement, combined with novel copper‑foil roughness treatment, achieving a 21.5 % insertion‑loss improvement over the previous generation and demonstrating feasibility for 224 Gbps deployments.

Download: https://dcon24.mapyourshow.com/8_0/sessions/session-details.cfm?scheduleid=149

The ByteDance network engineering team also develops self‑designed switches, including a 51.2 T 800 G switch that consolidates 64 ports on a single MAC PCB, slated for large‑scale rollout by the end of February 2024.